JOURNAL OF SHANDONG UNIVERSITY (ENGINEERING SCIENCE) ›› 2013, Vol. 43 ›› Issue (3): 99-104.

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Design of highperformance CML ternary D flipflop based on BiCMOS

ZHAO Xiang-hong1, 2, SHEN Ji-zhong2*   

  1. 1. Ningbo Institute of Technology, Zhejiang University, Ningbo 315100, China;
    2. Department of Information Science ＆ Electronic Engineering, Zhejiang University, Hangzhou 310027, China
  • Received:2012-12-05 Online:2013-06-20 Published:2012-12-05

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Abstract:

A simple-structure high-performance CML ternary D flip-flop based on BiCMOS was proposed, which combined both advantages of BiCMOS and CML circuits, and included high-speed and strong drive ability of BiCMOS circuits and high speed low swing and low noise of CML circuits. Using TSMC 180nm process, the results of simulations carried out by HSPICE illustrated that the proposed circuit could not only have correct logic function, but also gain improvements of 95.6％-98.4％ in average D-Q delay and 16.2％-96.8％ in PDP compared with the advanced ternary D flip-flops. Furthermore, the work frequency  could perform up to 15GHz. All of the results proved that the proposed circuit was suitable for high-speed and high-frequency applications.

Key words:  flip-flop, multi-valued logic, current-mode logic, CML, low-power, high-speed integrated circuits

CLC Number: 

  • TN43
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